In a synchronous communications network, digital payload data is carried on a particular clock frequency within a synchronous message format. This payload data may include both asynchronous digital data and synchronous digital data originating at a different data rate in a foreign digital network. The Synchronous Optical Network (SONET) and its European counterpart the Synchronous Digital Hierarchy (SDH) provide a standard format of transporting digital signals having various data rates, such as a DS-0, DS-1, DS-1C, DS-2, or a DS-3 signal and their European counterparts within a Synchronous Payload Envelope (SPE), or a container that is a part of a SONET/SDH STS-N/STM-N message frame. In addition to the digital data that is mapped and framed within the SPE or container, the STS-N/STM-N message frame also includes overhead data that provides for coordination between various network elements.
One of the benefits of SONET is that is can carry large payloads (above 50 Mb/s). However, the existing slower speed digital hierarchy can be accommodated as well, thus protecting investments in current equipment. To achieve this capacity, the STS Synchronous Payload Envelope (SPE) can be sub-divided into smaller components or structures, known as Virtual Tributaries (VT) for the purpose of transporting and switching payloads smaller than the STS-1 rate. All services below the DS3 and E-3 rates are transported in the VT structure.
In SONET there are four sizes of virtual tributaries, a VT-6 (12 columns of data), VT-3 (6 columns of data), VT-2 (4 columns of data), and VT-1.5 (3 columns of data). A virtual group (VG) is formed of a single type of VT and by definition each VG contains 12 columns of data. Thus, there can be one (1) VT-6, two (2) VT-3, three (3) VT-2, or 4 VT-1.5 VTs per VG. Because there are 12 data columns per VG, there will be seven VGs within a single STS-1 SPE, with a column of data providing the path overhead data and two (2) columns of stuff data. The VGs are grouped within a Virtual Superframe that comprises four (4) consecutive STS-1 message frames, or 28 VGs. The 28 VGs within the superframe each have varying numbers of VTs within them, and together define a virtual SPE. The VTs contained within the virtual SPE may be operated in a fixed or floating mode. In a fixed mode, the VT mapping into the four (4) STS-1 SPEs comprising the superframe is fixed. This reduces the interface complexity and is designed for maximum efficiency of the network elements. A floating VT mode allows the VT to float within the virtual SPE defined for the VTs. A floating VT requires a VT payload pointer and VT path overhead. In the case of a VT floating within virtual superframe, the VT payload pointer is defined by bytes, V1, V2. In addition, payload resynchronization and payload adjustment is accomplished using the V1, V2, and V3 in the same manner as the H1, H2, and H3 bytes in the transport overhead of the STS-1 message as described below.
Similarly, in a SDH STM-1 message, which is based on a 1.5 Mbit/s hierarchy, there is a bandwidth flexible virtual container (VC) that allows the transmission of high-speed packet switched services, ATM, contribution video, and distribution video. In addition, the VC allows transport and networking at the 2 Mbit/s, 34 Mbit/s, and 140 Mbit/s in addition to the 1.5 Mbit/s hierarchy.
The lowest level of multiplexing in a SDH message includes a single container (C). The containers are used to create a uniform virtual container (VC) payload through bit-stuffing to bring all the inputs to the container to a common bit-rate that is suitable for multiplexing in the VCs. There are two levels of VCs. A low level VC, i.e., VC-11, VC-12, and VC-2, that include data at a rate from 1.5 Mbit/s to 6 Mbits/s. Upper level VCs, i.e., VC-3 and VC-4, include data at a rate of 34/45 Mbit/s and 140 Mbit/s. The various VCs are converted into Transmission Units(TUs) with the addition of tributary pointer information. Thus, a VC-11 becomes a TU-11, a VC-12 becomes a TU-12, a VC-2 becomes a TU-2, and a VC-3 becomes a TU-3.
A single TU-2 or 3 TU-12s, or 4 TU-11s are combined into a Transmission Unit Group 2(TUG-2). Seven TUG-2s can be used to form a VC-3 or a TUG-3 message. Three TUG-3s are combined to form a VC-4. Three VC-3s or a single VC-4 are converted into an administrative unit three (AU-3) or an AU-4 respectively, with the addition of an administrative unity pointer. Three AU-3s or a single AU-4 are formed into an Administrative Unit Group (AUG). One AU-4, four AU-4s, or 16 AU-4s are formed into an STM-1 message, STM-4 message, or an STM-16 message respectively. The administrative unit group forms the SPE of the SDH STM-1 message.
In a floating TU mode, four consecutive 125 microsecond frames of the VC-4 are combined into a single 500 microsecond called a TU multi-frame. The tributary units comprising the TU multi-frame signal also contains payload pointers to allow for flexible and dynamic alignment of the VCs within the TU multi-frame. In this instance, the payload pointer value indicates the offset from the TU to the first byte of the lower order VC. This mechanism allows the AU and TU VC payloads to vary with respect to phase to one another and to the network, while allowing the VCs comprising the AUs and TUs to be synchronously multiplexed. The TU multi-frame overhead consists of four bytes: V1, V2, V3, and V4. Each of the four bytes is located in the first bytes of the respective TU frame in the TU multi-frame signal. The V1 and V2 bytes designate the position of the first byte of the VC, the V3 byte provides a payload pointer adjustment opportunity, and the V4 byte is reserved. Thus each of the VCs within an STM can float relative to one another
If the digital data that is mapped and framed in the STS-N/STM-N message was originally carried by a clock signal having a different frequency than the SONET/SDH line rate clock, certain adjustments to the framed digital data must be made. For example, if a DS-3 data signal, which is carried by a 44.736 MHz DS-3 clock signal is to be carried in a SONET/SDH fiber-optic network, the DS3 signal is mapped into the higher rate SPE of an STS-1 message, extra bits must be added to the DS-3 signal prior to transmission through the SONET/SDH network. These extra bits are commonly referred to as stuff bits or gap bits and are merely place markers and in general carry no valid data. These gap bits are required because the DS-3 signal is slower than the SONET/SDH clock frequency so that there are not enough DS-3 bits at the higher frequency to form a complete SONET frame. More detail may be found in the Bellcore specification “SONET Transport Systems: Common Generic Criteria”, GR-253-CORE, Issue 3, September 2000, the Bellcore specification “Transport Systems Generic Requirements (TSGR): Common Requirements”, GR-499-CORE, Issue 2, December 1998, and the ITU-T Recommendation G.783, “Characteristics of Synchronous Digital Hierarchy (SDH) Equipment Functional Blocks”, January 1994.
When the STS-1 message is received at a network exit node, the overhead bytes are removed from the SONET STS-1 message and replaced by gaps in the data stream. The payload data that remains is de-framed and de-mapped into a data stream carried by a higher clock frequency than the nominal original clock frequency of the payload data. Thus the stuff data that was inserted when the data was mapped into the SPE remains when the data stream is recovered from the SPE and is also replaced by gaps in the data stream. Thus, the recovered payload data contains gaps in the data stream remaining after the overhead bytes and stuff data bits have been removed. If, for example, DS-3 data has been transported via a SONET/SDH network, the DS-3 data must be converted from the SONET clock signal to the lower frequency DS-3 clock signal and the gap data bits must be removed prior to the DS-3 signal being B3ZS-encoded for electrical re-transmission.
To transfer data from one clock domain to another, for example from the DS-3 embedded within the SONET signal rate to the proper DS-3 signal rate, a desynchronizer is used to provide a buffering mechanism between the clock domains. A desynchronizer typically includes an elastic store first-in-first-out memory buffer that receives gapped data recovered from a synchronized data payload as an input at one clock frequency and stores the data in appropriate storage locations. Data is read from the elastic store buffer at a different clock frequency and is provided as output data at that frequency. This output data does not contain the gap data bits that were added when the slower signal was mapped into the faster SONET/SDH STS-1 message.
Once the data has been de-mapped and de-framed from the SPE and the gaps removed, a phase locked loop (PLL)is typically used to recover the clock information and to adjust the read signal associated with the data stored in the elastic store for transmission downstream as a data signal carried by a smooth clock signal.
Although the SONET/SDH fiber optic network is a synchronous network, variations in clock signals across the network may occur. These variations in clock signals between various network elements may cause a loss of data downstream from the sender if the clock signal at which data was written to the synchronous signal and the clock signal at which the data was read from the synchronous payload are sufficiently different. A variety of conditions can cause variations in clock signals. For example, network clock instability, electrical noise and interference, effective changes in the length of transmission media, changes in the velocity of propagation, Doppler shifts, and irregular timing information and other electrical and network problems may all cause clock variations.
To mitigate the problems caused by clock variations across a network, the SONET/SDH STS-N/STM-N messages are provided with a pointer adjustment mechanism within the transmission overhead bytes that allow for some movement of the data within the SPE. The pointer adjustment mechanism includes a pair of bytes, H1 and H2, that identify the start of the next SONET/SDH payload byte and also indicate if the pointer adjustment byte, H3, is to be used. The third overhead byte, H3, provides for active pointer adjustment when a negative justification of the SPE is required. Negative justification involves posting valid data in the H3 byte. Positive justification involves marking the byte after the H3 byte as a dummy or stuff byte. These pointer adjustments allow for eight (8) bits of data to be added to a SONET/SDH message frame (using the H3 overhead byte) or for eight (8) bits to be removed from the frame. This allows for the SPE to be re-framed and re-synched at a network node that has a slightly different network clock. Thus, in addition to the gap data necessary to compensate for payload data that is carried by a different frequency clock signal, eight bits of data may be added or removed at each network element in the network due to clock instability in the network.
Pointer adjustments can be periodic or aperiodic in nature. A periodic pointer adjustment may be caused, for example, when the SPE transporting the data has a constant clock offset at the output node of the network relative to the input node. An aperiodic or non-periodic pointer adjustment may be bursty in nature when caused by a transient problem or condition within the network.
Although the synchronous system may adjust the payload data using pointer adjustments to account for clock and phase variations, the clock and phase shifts caused by the pointer adjustments and/or the de-gapping of the payload data can affect the output rate of the data clock provided by the PLL. Typically, clock and phase shifts have two components. One is a high frequency jitter component that is classified as a clock or phase shift that is greater than 10 Hz. A second is a low frequency wander component that is classified as a clock or phase shift that is less than 10 Hz.
Jitter refers to the phase variations in the clock signal, which may cause errors in identifying bit positions and values accurately, and is therefore an issue in synchronous systems. The jitter requirement for SONET can be found in the ANSI document “Synchronous Optical Network (SONET)—Jitter at Network Interfaces”, ANSI-T1.105.03-1994. Wander refers to phase variations that typically affect the frame and time-slot synchronization. The wander requirement for SONET can be found in the ANSI document “Synchronous Optical Network (SONET)—Jitter at Network Interfaces—DS3 Wander Supplement”, ANSI-T1.105.03b-1997. Each network element adds some amount of noise to the SPE that eventually contributes to the timing instability in the form of jitter and wander in the recovered payload signal.
As is known, the PLL used to recover the smooth clock signal and smooth data signal is able to smooth out some phase jumps caused by pointer adjustments or asynchronous stuff bits. A PLL is most effective at filtering out high frequency jitter components, i.e., those with a frequency greater than 10 Hz., but is less effective at filtering out the low frequency wander components. Since, typically the wander components are much less than 10 Hz. these wander components are well within the bandwidth of the PLL and are passed without being attenuated. To construct a PLL with a small enough bandwidth to filter the wander components of the phase jumps, large time constants in the PLL control loops would require large component values for the resistors and capacitors used in the PLL. In addition, the large time constants required would result in a PLL that is slow to lock onto the reference signal and would cause long delays in recovering lock after a transient event.
One source of wander errors in the output data rate can be caused by the pointer adjustments within the synchronous signals. Each pointer adjustment signal or asynchronous gap data results in a data gap for a given number of clock cycles. For example, an 8-bit pointer adjustment that occurs once a second or more is a low frequency change in the data rate. Redistributing this signal into a higher frequency, for example 1 bit every ⅛ of second, aids the PLL in filtering and recovering the underlying data signal.
When a pointer adjustment is received however, there will be eight (8) bits that are added to the elastic store or skipped and not written to the elastic store. The inconsistent nature of the gapped data can result in large changes in the data output rate. The ratio between the input data rate and the output data rate may change by a value sufficiently large that the elastic store can experience a data overflow condition or a data underflow condition. Data overflow occurs when data is written to the elastic store at a faster rate than usual, or read at a slower rate than usual, causing the elastic store to accumulate data. The elastic store will be unable to store all of the incoming data, and data will be lost. Similarly, data underflow occurs when data is written to the elastic store at a slower rate than usual, or read at a faster rate than usual, causing the elastic store to lose data. In this circumstance no data will be read from the elastic store.
Typically, the elastic store used in the desynchronizer will have a write/read control system that attempts to maintain the output data rate at a specified rate, and maintain the elastic store at a predetermined fill level. If the elastic store begins to overfill, the write/read control system will increase the data output rate of the elastic store until the proper storage level in the elastic store is reached. Once the proper storage level is reached, the write/read control system will decrease the data output rate. If the elastic store begins to underfill, the write/read control system will decrease the data output rate of the elastic store until the proper storage level in the elastic store is reached. Once the proper level is reached, the write/read control system will increase the data output rate.
Typically, pointer adjustments are resolved by “leaking” bits from the elastic store at a predetermined rate over a predetermined period of time. Leaking the bits one at a time prevents the excess bits from the pointer adjustment from negatively affecting the output data rate. Yet, as noted above, pointer adjustments may occur either periodically or non-periodically. A constant “bit leaking” rate is unable to adequately leak bits to cover a wide range of periodic pointer adjustments or bursty non-periodic pointer adjustments. If sporadic pointer bursts occur on top of the periodic pointer adjustments due to the effect of the TUG-3 or virtual superframe signal carried in the SDH or SONET signal respectively, or if multiple pointer adjustments occur in a bursty fashion the fixed bit leak rate would be unable to respond and overflow or underflow of the elastic store may occur.
As noted above, the VT or VC-4 pointer bytes V1, V2, and V3 operate in the same manner as the H1, H2, and H3 pointer bytes described herein. Similar problems related to the processing of the VT pointer bytes occurs, and the positive justification of the VT pointer bytes is accomplished by assigning the bytes immediately after the V3 byte as a positive stuff opportunity byte. Negative justification is accomplished by assigning the V3 byte to contain valid data. The frequency and polarity of the pointer adjustments to the VT pointer bytes is uncorrelated to the frequency of the pointer adjustments made to the SONET/SDH pointer bytes. In addition, the wander and jitter associated with the pointer adjustments is also uncorrelated between the transport overhead pointer bytes and the VT overhead pointer bytes.
Thus it would be advantageous to provide a desynchronizer that is able to provide extracted data at an output rate having reduced jitter and wander and be able to adapt the output data rate to a plurality of pointer adjustments without sacrificing data integrity.